\doxysection{C\+:/\+Users/\+ASUS/\+Desktop/dm-\/ctrl\+H7-\/balance-\/9025test/\+Drivers/\+STM32\+H7xx\+\_\+\+HAL\+\_\+\+Driver/\+Inc/stm32h7xx\+\_\+hal\+\_\+tim\+\_\+ex.h File Reference}
\hypertarget{stm32h7xx__hal__tim__ex_8h}{}\label{stm32h7xx__hal__tim__ex_8h}\index{C:/Users/ASUS/Desktop/dm-\/ctrlH7-\/balance-\/9025test/Drivers/STM32H7xx\_HAL\_Driver/Inc/stm32h7xx\_hal\_tim\_ex.h@{C:/Users/ASUS/Desktop/dm-\/ctrlH7-\/balance-\/9025test/Drivers/STM32H7xx\_HAL\_Driver/Inc/stm32h7xx\_hal\_tim\_ex.h}}


Header file of TIM HAL Extended module.  


{\ttfamily \#include "{}stm32h7xx\+\_\+hal\+\_\+def.\+h"{}}\newline
\doxysubsubsection*{Classes}
\begin{DoxyCompactItemize}
\item 
struct \mbox{\hyperlink{struct_t_i_m___hall_sensor___init_type_def}{TIM\+\_\+\+Hall\+Sensor\+\_\+\+Init\+Type\+Def}}
\begin{DoxyCompactList}\small\item\em TIM Hall sensor Configuration Structure definition. \end{DoxyCompactList}\end{DoxyCompactItemize}
\doxysubsubsection*{Macros}
\begin{DoxyCompactItemize}
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_ga5156e463b51b1a7d92e6d87c2be4563a}{TIM\+\_\+\+TIM1\+\_\+\+ETR\+\_\+\+GPIO}}~0x00000000U
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_ga2e3eb3f4f99db6c14b3ce91bebfe8d07}{TIM\+\_\+\+TIM1\+\_\+\+ETR\+\_\+\+COMP1}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga1e5c447a1de2571985f74ca5ee201c56}{TIM1\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+0}}
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_ga734d16e8c8e368bedc159f97422e26b9}{TIM\+\_\+\+TIM1\+\_\+\+ETR\+\_\+\+COMP2}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga269809ebc603562522c733f7b518bcc3}{TIM1\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+1}}
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_gaa5a7accd83b70cbaf790bd26fd8e4538}{TIM\+\_\+\+TIM1\+\_\+\+ETR\+\_\+\+ADC1\+\_\+\+AWD1}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga269809ebc603562522c733f7b518bcc3}{TIM1\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+1}} \texorpdfstring{$\vert$}{|} \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga1e5c447a1de2571985f74ca5ee201c56}{TIM1\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+0}})
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_ga4ee5007933efeaae07c745062ffc2776}{TIM\+\_\+\+TIM1\+\_\+\+ETR\+\_\+\+ADC1\+\_\+\+AWD2}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga891aa4abfb026ec12d7e78366c57861c}{TIM1\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+2}})
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_ga6a448a71300d1f8f81e6eb0dcc31f15a}{TIM\+\_\+\+TIM1\+\_\+\+ETR\+\_\+\+ADC1\+\_\+\+AWD3}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga891aa4abfb026ec12d7e78366c57861c}{TIM1\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+2}} \texorpdfstring{$\vert$}{|} \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga1e5c447a1de2571985f74ca5ee201c56}{TIM1\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+0}})
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_ga95a93aa08f9c8b8d58dd6e30e30f41c1}{TIM\+\_\+\+TIM1\+\_\+\+ETR\+\_\+\+ADC3\+\_\+\+AWD1}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga891aa4abfb026ec12d7e78366c57861c}{TIM1\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+2}} \texorpdfstring{$\vert$}{|} \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga269809ebc603562522c733f7b518bcc3}{TIM1\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+1}})
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_gad3cbe27b5e94414e39b52843054a4cee}{TIM\+\_\+\+TIM1\+\_\+\+ETR\+\_\+\+ADC3\+\_\+\+AWD2}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga891aa4abfb026ec12d7e78366c57861c}{TIM1\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+2}} \texorpdfstring{$\vert$}{|} \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga269809ebc603562522c733f7b518bcc3}{TIM1\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+1}} \texorpdfstring{$\vert$}{|} \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga1e5c447a1de2571985f74ca5ee201c56}{TIM1\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+0}})
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_gaf0be1d196c76f0d45c4f41d61d4af0f6}{TIM\+\_\+\+TIM1\+\_\+\+ETR\+\_\+\+ADC3\+\_\+\+AWD3}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga4b00c39efe4c62ef0c7391da38f4d93e}{TIM1\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+3}}
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_gabcec3c5e9dad306b68d34e5b9257a281}{TIM\+\_\+\+TIM8\+\_\+\+ETR\+\_\+\+GPIO}}~0x00000000U
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_gadcbcb76d19c2ccb5ae46fdc7e7d88f8b}{TIM\+\_\+\+TIM8\+\_\+\+ETR\+\_\+\+COMP1}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga0ff3eda56bcb98d020fa1b1573c4f912}{TIM8\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+0}}
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_gae93f8a76facb81f8d962bb7c88dc25f0}{TIM\+\_\+\+TIM8\+\_\+\+ETR\+\_\+\+COMP2}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga8115191f924a8817c45e04078725f242}{TIM8\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+1}}
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_ga7a832c5903108f2a06208c58585f7579}{TIM\+\_\+\+TIM8\+\_\+\+ETR\+\_\+\+ADC2\+\_\+\+AWD1}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga8115191f924a8817c45e04078725f242}{TIM8\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+1}} \texorpdfstring{$\vert$}{|} \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga0ff3eda56bcb98d020fa1b1573c4f912}{TIM8\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+0}})
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_gae0c7be84fda65b37b00a8896b98775c3}{TIM\+\_\+\+TIM8\+\_\+\+ETR\+\_\+\+ADC2\+\_\+\+AWD2}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga7dc91956b73a05f0ab3465a124e27e97}{TIM8\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+2}})
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_ga02c57d201dbc0416eed0e333a6347b5b}{TIM\+\_\+\+TIM8\+\_\+\+ETR\+\_\+\+ADC2\+\_\+\+AWD3}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga7dc91956b73a05f0ab3465a124e27e97}{TIM8\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+2}} \texorpdfstring{$\vert$}{|} \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga0ff3eda56bcb98d020fa1b1573c4f912}{TIM8\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+0}})
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_ga7cb16632bf98d6961d21172aa42373e3}{TIM\+\_\+\+TIM8\+\_\+\+ETR\+\_\+\+ADC3\+\_\+\+AWD1}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga7dc91956b73a05f0ab3465a124e27e97}{TIM8\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+2}} \texorpdfstring{$\vert$}{|} \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga8115191f924a8817c45e04078725f242}{TIM8\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+1}})
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_ga84b90475edbe94a4cdbef6f5f602ac9b}{TIM\+\_\+\+TIM8\+\_\+\+ETR\+\_\+\+ADC3\+\_\+\+AWD2}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga7dc91956b73a05f0ab3465a124e27e97}{TIM8\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+2}} \texorpdfstring{$\vert$}{|} \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga8115191f924a8817c45e04078725f242}{TIM8\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+1}} \texorpdfstring{$\vert$}{|} \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga0ff3eda56bcb98d020fa1b1573c4f912}{TIM8\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+0}})
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_ga8f39897f883d4efa8357d1ba28bc100b}{TIM\+\_\+\+TIM8\+\_\+\+ETR\+\_\+\+ADC3\+\_\+\+AWD3}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga97fe71b195c1bbc5175e3db42d09c062}{TIM8\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+3}}
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_ga05e1c800a3f8e7eb60b50f446cf321f7}{TIM\+\_\+\+TIM2\+\_\+\+ETR\+\_\+\+GPIO}}~0x00000000U
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_ga79a125bc7559dc01f8de056e19f11972}{TIM\+\_\+\+TIM2\+\_\+\+ETR\+\_\+\+COMP1}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaaa7a4ed17a8432d8c81e31e32dd87e20}{TIM2\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+0}})
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_ga76dfe019f143b4bff5ba2c2e1a38a387}{TIM\+\_\+\+TIM2\+\_\+\+ETR\+\_\+\+COMP2}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga6a1413b9834ebc2b96c8eb27b74b0fdc}{TIM2\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+1}})
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_gae69141882323f8b603da7a0343995dca}{TIM\+\_\+\+TIM2\+\_\+\+ETR\+\_\+\+RCC\+\_\+\+LSE}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga6a1413b9834ebc2b96c8eb27b74b0fdc}{TIM2\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+1}} \texorpdfstring{$\vert$}{|} \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga0ff3eda56bcb98d020fa1b1573c4f912}{TIM8\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+0}})
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_ga901919d24f481b3ca744ff06cd98bdb8}{TIM\+\_\+\+TIM2\+\_\+\+ETR\+\_\+\+SAI1\+\_\+\+FSA}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga38cf3fbfe20afba58f315ace95c88016}{TIM2\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+2}}
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_gab369084ac6b74b818f48995770cf2221}{TIM\+\_\+\+TIM2\+\_\+\+ETR\+\_\+\+SAI1\+\_\+\+FSB}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga38cf3fbfe20afba58f315ace95c88016}{TIM2\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+2}} \texorpdfstring{$\vert$}{|} \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga0ff3eda56bcb98d020fa1b1573c4f912}{TIM8\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+0}})
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_gad86579b249d2c04a99c8412a8c72af97}{TIM\+\_\+\+TIM3\+\_\+\+ETR\+\_\+\+GPIO}}~0x00000000U
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_gaea6cbaddf4da816fd4afd13ad7953079}{TIM\+\_\+\+TIM3\+\_\+\+ETR\+\_\+\+COMP1}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaaf25073af3e775f18278b711d3719957}{TIM3\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+0}}
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_ga5df745d19761f4c212140c70d4271692}{TIM\+\_\+\+TIM5\+\_\+\+ETR\+\_\+\+GPIO}}~0x00000000U
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_gaca05dbe7ce7bc979d5e30f355285a51c}{TIM\+\_\+\+TIM5\+\_\+\+ETR\+\_\+\+SAI2\+\_\+\+FSA}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gabaeb0ecb379e37e51722902144404520}{TIM5\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+0}}
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_ga11e3c0b2d38048d8d15e8623ff61a408}{TIM\+\_\+\+TIM5\+\_\+\+ETR\+\_\+\+SAI2\+\_\+\+FSB}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga92b38d638ecda48a0da085cfd8ce86bf}{TIM5\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+1}}
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_gac6ad331bf73260161a6e9c3b2ee412f3}{TIM\+\_\+\+TIM5\+\_\+\+ETR\+\_\+\+SAI4\+\_\+\+FSA}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gabaeb0ecb379e37e51722902144404520}{TIM5\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+0}}
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_ga5dd267b5ce57d4c9d0736f3da988d9d9}{TIM\+\_\+\+TIM5\+\_\+\+ETR\+\_\+\+SAI4\+\_\+\+FSB}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga92b38d638ecda48a0da085cfd8ce86bf}{TIM5\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+1}}
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_gae50809628b49070fd6720a5a28e5e175}{TIM\+\_\+\+TIM23\+\_\+\+ETR\+\_\+\+GPIO}}~0x00000000U
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_ga818b9fe379711929c05c8cd61dcd45f2}{TIM\+\_\+\+TIM23\+\_\+\+ETR\+\_\+\+COMP1}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaaa7a4ed17a8432d8c81e31e32dd87e20}{TIM2\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+0}})
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_ga7365daffa2ee6ff2680a2cce2251499b}{TIM\+\_\+\+TIM23\+\_\+\+ETR\+\_\+\+COMP2}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga6a1413b9834ebc2b96c8eb27b74b0fdc}{TIM2\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+1}})
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_ga7baa5fe8462ef94cae713e4367d9d3e8}{TIM\+\_\+\+TIM24\+\_\+\+ETR\+\_\+\+GPIO}}~0x00000000U
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_ga02942441fbd3f26678ff95395a09b89c}{TIM\+\_\+\+TIM24\+\_\+\+ETR\+\_\+\+SAI4\+\_\+\+FSA}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gabaeb0ecb379e37e51722902144404520}{TIM5\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+0}}
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_gade1f234256056c4a8739abb2c6e35f26}{TIM\+\_\+\+TIM24\+\_\+\+ETR\+\_\+\+SAI4\+\_\+\+FSB}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga92b38d638ecda48a0da085cfd8ce86bf}{TIM5\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+1}}
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_gab59f38eafd161977848d82893351f552}{TIM\+\_\+\+TIM24\+\_\+\+ETR\+\_\+\+SAI1\+\_\+\+FSA}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga6a1413b9834ebc2b96c8eb27b74b0fdc}{TIM2\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+1}} \texorpdfstring{$\vert$}{|} \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga0ff3eda56bcb98d020fa1b1573c4f912}{TIM8\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+0}})
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___remap_ga0bf08e73da65956929e36e05e4873c42}{TIM\+\_\+\+TIM24\+\_\+\+ETR\+\_\+\+SAI1\+\_\+\+FSB}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga38cf3fbfe20afba58f315ace95c88016}{TIM2\+\_\+\+AF1\+\_\+\+ETRSEL\+\_\+2}}
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_ga4d3d7a7e977f98110d2833d2feb7236a}{TIM\+\_\+\+TIM1\+\_\+\+TI1\+\_\+\+GPIO}}~0x00000000U
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_gabba4a562a6e0f83acf57807e50de0de4}{TIM\+\_\+\+TIM1\+\_\+\+TI1\+\_\+\+COMP1}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gac8352e91e70524bf299ae524b17fc4b2}{TIM\+\_\+\+TISEL\+\_\+\+TI1\+SEL\+\_\+0}}
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_ga94308cf0e1eebb9a46fdd9c907b41cf5}{TIM\+\_\+\+TIM8\+\_\+\+TI1\+\_\+\+GPIO}}~0x00000000U
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_ga226e4035e59e5d1a566d7d673f858f35}{TIM\+\_\+\+TIM8\+\_\+\+TI1\+\_\+\+COMP2}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gac8352e91e70524bf299ae524b17fc4b2}{TIM\+\_\+\+TISEL\+\_\+\+TI1\+SEL\+\_\+0}}
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_ga11cd0b8d94b5ab46488aa3f2c3769d1f}{TIM\+\_\+\+TIM2\+\_\+\+TI4\+\_\+\+GPIO}}~0x00000000U
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_ga10665a31da680e9c23ff66b4e9f85b1e}{TIM\+\_\+\+TIM2\+\_\+\+TI4\+\_\+\+COMP1}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gabe0b9c7718f9609776afdbb0ebcc3832}{TIM\+\_\+\+TISEL\+\_\+\+TI4\+SEL\+\_\+0}}
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_ga4d384c8a9c0687b64290b54c256a5152}{TIM\+\_\+\+TIM2\+\_\+\+TI4\+\_\+\+COMP2}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaf6106b6c27078a60113e888b0142ccb8}{TIM\+\_\+\+TISEL\+\_\+\+TI4\+SEL\+\_\+1}}
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_ga0449ea1c33b15b3f91222fcb3a239559}{TIM\+\_\+\+TIM2\+\_\+\+TI4\+\_\+\+COMP1\+\_\+\+COMP2}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_gabe0b9c7718f9609776afdbb0ebcc3832}{TIM\+\_\+\+TISEL\+\_\+\+TI4\+SEL\+\_\+0}} \texorpdfstring{$\vert$}{|} \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaf6106b6c27078a60113e888b0142ccb8}{TIM\+\_\+\+TISEL\+\_\+\+TI4\+SEL\+\_\+1}})
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_ga43e965c08be4bb981520165b1febf6c5}{TIM\+\_\+\+TIM3\+\_\+\+TI1\+\_\+\+GPIO}}~0x00000000U
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_gad862ada9f9f69885f4f891cac338eb20}{TIM\+\_\+\+TIM3\+\_\+\+TI1\+\_\+\+COMP1}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gac8352e91e70524bf299ae524b17fc4b2}{TIM\+\_\+\+TISEL\+\_\+\+TI1\+SEL\+\_\+0}}
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_ga6d1cab356ab9db2d3a65327992bdf97f}{TIM\+\_\+\+TIM3\+\_\+\+TI1\+\_\+\+COMP2}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gad452efbdd8b96c975f09b1c10eb43c90}{TIM\+\_\+\+TISEL\+\_\+\+TI1\+SEL\+\_\+1}}
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_gaaf704734fd8855bfcfe8bf8591bd3d53}{TIM\+\_\+\+TIM3\+\_\+\+TI1\+\_\+\+COMP1\+\_\+\+COMP2}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_gac8352e91e70524bf299ae524b17fc4b2}{TIM\+\_\+\+TISEL\+\_\+\+TI1\+SEL\+\_\+0}} \texorpdfstring{$\vert$}{|} \mbox{\hyperlink{group___peripheral___registers___bits___definition_gad452efbdd8b96c975f09b1c10eb43c90}{TIM\+\_\+\+TISEL\+\_\+\+TI1\+SEL\+\_\+1}})
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_ga0887eba35836a73c891e2ad168a3da16}{TIM\+\_\+\+TIM5\+\_\+\+TI1\+\_\+\+GPIO}}~0x00000000U
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_gabe5775cefd01431696ab62620b7a5d6b}{TIM\+\_\+\+TIM5\+\_\+\+TI1\+\_\+\+CAN\+\_\+\+TMP}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gac8352e91e70524bf299ae524b17fc4b2}{TIM\+\_\+\+TISEL\+\_\+\+TI1\+SEL\+\_\+0}}
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_ga41a79c22055cb2f84a9ca574c3ab596c}{TIM\+\_\+\+TIM5\+\_\+\+TI1\+\_\+\+CAN\+\_\+\+RTP}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gad452efbdd8b96c975f09b1c10eb43c90}{TIM\+\_\+\+TISEL\+\_\+\+TI1\+SEL\+\_\+1}}
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_ga56544cebe96b454970fd3f754d3c9c49}{TIM\+\_\+\+TIM12\+\_\+\+TI1\+\_\+\+GPIO}}~0x00000000U
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_gaf47b84ebb87bad97064fdb017ead9151}{TIM\+\_\+\+TIM12\+\_\+\+TI1\+\_\+\+SPDIF\+\_\+\+FS}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gac8352e91e70524bf299ae524b17fc4b2}{TIM\+\_\+\+TISEL\+\_\+\+TI1\+SEL\+\_\+0}}
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_ga203fd51591dbc76d09a12d1ca4e539a1}{TIM\+\_\+\+TIM15\+\_\+\+TI1\+\_\+\+GPIO}}~0x00000000U
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_gad7f0c85a8acd135947bdb67db634e3b1}{TIM\+\_\+\+TIM15\+\_\+\+TI1\+\_\+\+TIM2\+\_\+\+CH1}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gac8352e91e70524bf299ae524b17fc4b2}{TIM\+\_\+\+TISEL\+\_\+\+TI1\+SEL\+\_\+0}}
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_gae48754f7fa79114b029d245eea699b84}{TIM\+\_\+\+TIM15\+\_\+\+TI1\+\_\+\+TIM3\+\_\+\+CH1}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gad452efbdd8b96c975f09b1c10eb43c90}{TIM\+\_\+\+TISEL\+\_\+\+TI1\+SEL\+\_\+1}}
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_gaf2c8be800c5ea6a82734ade8f5bb5e1e}{TIM\+\_\+\+TIM15\+\_\+\+TI1\+\_\+\+TIM4\+\_\+\+CH1}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_gac8352e91e70524bf299ae524b17fc4b2}{TIM\+\_\+\+TISEL\+\_\+\+TI1\+SEL\+\_\+0}} \texorpdfstring{$\vert$}{|} \mbox{\hyperlink{group___peripheral___registers___bits___definition_gad452efbdd8b96c975f09b1c10eb43c90}{TIM\+\_\+\+TISEL\+\_\+\+TI1\+SEL\+\_\+1}})
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_ga53599dcd4f5502bf1c76670f03aac081}{TIM\+\_\+\+TIM15\+\_\+\+TI1\+\_\+\+RCC\+\_\+\+LSE}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga1bcab70466ce0c2bf5b052ef9963d0c7}{TIM\+\_\+\+TISEL\+\_\+\+TI1\+SEL\+\_\+2}})
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_ga4d4938b548affd930758e2801f48eb07}{TIM\+\_\+\+TIM15\+\_\+\+TI1\+\_\+\+RCC\+\_\+\+CSI}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga1bcab70466ce0c2bf5b052ef9963d0c7}{TIM\+\_\+\+TISEL\+\_\+\+TI1\+SEL\+\_\+2}} \texorpdfstring{$\vert$}{|} \mbox{\hyperlink{group___peripheral___registers___bits___definition_gac8352e91e70524bf299ae524b17fc4b2}{TIM\+\_\+\+TISEL\+\_\+\+TI1\+SEL\+\_\+0}})
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_ga2205065d06dc15721f52ccc6c7d6e0eb}{TIM\+\_\+\+TIM15\+\_\+\+TI1\+\_\+\+RCC\+\_\+\+MCO2}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga1bcab70466ce0c2bf5b052ef9963d0c7}{TIM\+\_\+\+TISEL\+\_\+\+TI1\+SEL\+\_\+2}} \texorpdfstring{$\vert$}{|} \mbox{\hyperlink{group___peripheral___registers___bits___definition_gad452efbdd8b96c975f09b1c10eb43c90}{TIM\+\_\+\+TISEL\+\_\+\+TI1\+SEL\+\_\+1}})
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_gac24fe62f6e315b6bf3315b70e808ef81}{TIM\+\_\+\+TIM15\+\_\+\+TI2\+\_\+\+GPIO}}~0x00000000U
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_ga3116230cad942525244192c4f0bb1fbe}{TIM\+\_\+\+TIM15\+\_\+\+TI2\+\_\+\+TIM2\+\_\+\+CH2}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga18532138f0c7423e6acb642933937cbb}{TIM\+\_\+\+TISEL\+\_\+\+TI2\+SEL\+\_\+0}})
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_gacc2c94f28892cfbc46fc27bab2d23cdd}{TIM\+\_\+\+TIM15\+\_\+\+TI2\+\_\+\+TIM3\+\_\+\+CH2}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_gac432d94cbea0fec68e3cf56c8b25a532}{TIM\+\_\+\+TISEL\+\_\+\+TI2\+SEL\+\_\+1}})
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_gadb9f1861b478966c9329ad9f540a4fcc}{TIM\+\_\+\+TIM15\+\_\+\+TI2\+\_\+\+TIM4\+\_\+\+CH2}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga18532138f0c7423e6acb642933937cbb}{TIM\+\_\+\+TISEL\+\_\+\+TI2\+SEL\+\_\+0}} \texorpdfstring{$\vert$}{|} \mbox{\hyperlink{group___peripheral___registers___bits___definition_gac432d94cbea0fec68e3cf56c8b25a532}{TIM\+\_\+\+TISEL\+\_\+\+TI2\+SEL\+\_\+1}})
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_gaf4435f9a5d0eb16d1b2b1192ad004392}{TIM\+\_\+\+TIM16\+\_\+\+TI1\+\_\+\+GPIO}}~0x00000000U
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_ga0fbcfc41d3049d0f638e2024c3650a21}{TIM\+\_\+\+TIM16\+\_\+\+TI1\+\_\+\+RCC\+\_\+\+LSI}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gac8352e91e70524bf299ae524b17fc4b2}{TIM\+\_\+\+TISEL\+\_\+\+TI1\+SEL\+\_\+0}}
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_ga921143f341cd81c4ce43f3d6ecae9df9}{TIM\+\_\+\+TIM16\+\_\+\+TI1\+\_\+\+RCC\+\_\+\+LSE}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gad452efbdd8b96c975f09b1c10eb43c90}{TIM\+\_\+\+TISEL\+\_\+\+TI1\+SEL\+\_\+1}}
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_ga9b830fb428d95bee93970c5405fb2fe3}{TIM\+\_\+\+TIM16\+\_\+\+TI1\+\_\+\+WKUP\+\_\+\+IT}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_gac8352e91e70524bf299ae524b17fc4b2}{TIM\+\_\+\+TISEL\+\_\+\+TI1\+SEL\+\_\+0}} \texorpdfstring{$\vert$}{|} \mbox{\hyperlink{group___peripheral___registers___bits___definition_gad452efbdd8b96c975f09b1c10eb43c90}{TIM\+\_\+\+TISEL\+\_\+\+TI1\+SEL\+\_\+1}})
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_gab97c8da0527e5686a80a50f906225e02}{TIM\+\_\+\+TIM17\+\_\+\+TI1\+\_\+\+GPIO}}~0x00000000U
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_ga3f1415fc8e6bf01ebdfad3c06f3bcc3c}{TIM\+\_\+\+TIM17\+\_\+\+TI1\+\_\+\+SPDIF\+\_\+\+FS}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gac8352e91e70524bf299ae524b17fc4b2}{TIM\+\_\+\+TISEL\+\_\+\+TI1\+SEL\+\_\+0}}
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_ga409efca3f95e233e2bf48908a7e25a94}{TIM\+\_\+\+TIM17\+\_\+\+TI1\+\_\+\+RCC\+\_\+\+HSE1\+MHZ}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gad452efbdd8b96c975f09b1c10eb43c90}{TIM\+\_\+\+TISEL\+\_\+\+TI1\+SEL\+\_\+1}}
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_ga96722a6c22463858abfcafa371a6a835}{TIM\+\_\+\+TIM17\+\_\+\+TI1\+\_\+\+RCC\+\_\+\+MCO1}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_gac8352e91e70524bf299ae524b17fc4b2}{TIM\+\_\+\+TISEL\+\_\+\+TI1\+SEL\+\_\+0}} \texorpdfstring{$\vert$}{|} \mbox{\hyperlink{group___peripheral___registers___bits___definition_gad452efbdd8b96c975f09b1c10eb43c90}{TIM\+\_\+\+TISEL\+\_\+\+TI1\+SEL\+\_\+1}})
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_gaa2e648e7357bd2545a1eeacd922d0b05}{TIM\+\_\+\+TIM23\+\_\+\+TI4\+\_\+\+GPIO}}~0x00000000U
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_gaa706392ffbe746d070a46365453eff0e}{TIM\+\_\+\+TIM23\+\_\+\+TI4\+\_\+\+COMP1}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gabe0b9c7718f9609776afdbb0ebcc3832}{TIM\+\_\+\+TISEL\+\_\+\+TI4\+SEL\+\_\+0}}
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_ga19d293cc1ce67979391149b8b9ff7ecb}{TIM\+\_\+\+TIM23\+\_\+\+TI4\+\_\+\+COMP2}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaf6106b6c27078a60113e888b0142ccb8}{TIM\+\_\+\+TISEL\+\_\+\+TI4\+SEL\+\_\+1}}
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_gae33fc9dfbd92dfa798438e41cbe461c7}{TIM\+\_\+\+TIM23\+\_\+\+TI4\+\_\+\+COMP1\+\_\+\+COMP2}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_gabe0b9c7718f9609776afdbb0ebcc3832}{TIM\+\_\+\+TISEL\+\_\+\+TI4\+SEL\+\_\+0}} \texorpdfstring{$\vert$}{|} \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaf6106b6c27078a60113e888b0142ccb8}{TIM\+\_\+\+TISEL\+\_\+\+TI4\+SEL\+\_\+1}})
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_ga172efd80a7592e1b949d12e7439c0b6a}{TIM\+\_\+\+TIM24\+\_\+\+TI1\+\_\+\+GPIO}}~0x00000000U
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_gafcabd2f57f3e9de1ef4863154ecfe810}{TIM\+\_\+\+TIM24\+\_\+\+TI1\+\_\+\+CAN\+\_\+\+TMP}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gac8352e91e70524bf299ae524b17fc4b2}{TIM\+\_\+\+TISEL\+\_\+\+TI1\+SEL\+\_\+0}}
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_ga668d33771d5bb3601f5981c7d5f7affe}{TIM\+\_\+\+TIM24\+\_\+\+TI1\+\_\+\+CAN\+\_\+\+RTP}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gad452efbdd8b96c975f09b1c10eb43c90}{TIM\+\_\+\+TISEL\+\_\+\+TI1\+SEL\+\_\+1}}
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___timer___input___selection_gaf6550208fd6a5aafc1ed97b65a836dc4}{TIM\+\_\+\+TIM24\+\_\+\+TI1\+\_\+\+CAN\+\_\+\+SOC}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_gabe0b9c7718f9609776afdbb0ebcc3832}{TIM\+\_\+\+TISEL\+\_\+\+TI4\+SEL\+\_\+0}} \texorpdfstring{$\vert$}{|} \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaf6106b6c27078a60113e888b0142ccb8}{TIM\+\_\+\+TISEL\+\_\+\+TI4\+SEL\+\_\+1}})
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___private___macros_gac11038f927b530ed9ff66cbf88b5fe48}{IS\+\_\+\+TIM\+\_\+\+BREAKINPUT}}(\+\_\+\+\_\+\+BREAKINPUT\+\_\+\+\_\+)
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___private___macros_ga8206e59b599377ce8abb3d806ffcf5a1}{IS\+\_\+\+TIM\+\_\+\+BREAKINPUTSOURCE}}(\+\_\+\+\_\+\+SOURCE\+\_\+\+\_\+)
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___private___macros_gafea36303ed2332cea12b392d987649e3}{IS\+\_\+\+TIM\+\_\+\+BREAKINPUTSOURCE\+\_\+\+STATE}}(\+\_\+\+\_\+\+STATE\+\_\+\+\_\+)
\item 
\#define \mbox{\hyperlink{group___t_i_m_ex___private___macros_ga350bdeccbe405fde9ab61b83a53321ea}{IS\+\_\+\+TIM\+\_\+\+BREAKINPUTSOURCE\+\_\+\+POLARITY}}(\+\_\+\+\_\+\+POLARITY\+\_\+\+\_\+)
\item 
\#define {\bfseries IS\+\_\+\+TIM\+\_\+\+TISEL}(\+\_\+\+\_\+\+TISEL\+\_\+\+\_\+)
\item 
\#define {\bfseries IS\+\_\+\+TIM\+\_\+\+REMAP}(\+\_\+\+\_\+\+RREMAP\+\_\+\+\_\+)
\end{DoxyCompactItemize}
\doxysubsubsection*{Functions}
\begin{DoxyCompactItemize}
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+Hall\+Sensor\+\_\+\+Init} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim, const \mbox{\hyperlink{struct_t_i_m___hall_sensor___init_type_def}{TIM\+\_\+\+Hall\+Sensor\+\_\+\+Init\+Type\+Def}} \texorpdfstring{$\ast$}{*}s\+Config)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+Hall\+Sensor\+\_\+\+De\+Init} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim)
\item 
void {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+Hall\+Sensor\+\_\+\+Msp\+Init} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim)
\item 
void {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+Hall\+Sensor\+\_\+\+Msp\+De\+Init} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+Hall\+Sensor\+\_\+\+Start} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+Hall\+Sensor\+\_\+\+Stop} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+Hall\+Sensor\+\_\+\+Start\+\_\+\+IT} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+Hall\+Sensor\+\_\+\+Stop\+\_\+\+IT} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+Hall\+Sensor\+\_\+\+Start\+\_\+\+DMA} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim, uint32\+\_\+t \texorpdfstring{$\ast$}{*}p\+Data, uint16\+\_\+t Length)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+Hall\+Sensor\+\_\+\+Stop\+\_\+\+DMA} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+OCN\+\_\+\+Start} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim, uint32\+\_\+t Channel)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+OCN\+\_\+\+Stop} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim, uint32\+\_\+t Channel)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+OCN\+\_\+\+Start\+\_\+\+IT} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim, uint32\+\_\+t Channel)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+OCN\+\_\+\+Stop\+\_\+\+IT} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim, uint32\+\_\+t Channel)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+OCN\+\_\+\+Start\+\_\+\+DMA} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim, uint32\+\_\+t Channel, const uint32\+\_\+t \texorpdfstring{$\ast$}{*}p\+Data, uint16\+\_\+t Length)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+OCN\+\_\+\+Stop\+\_\+\+DMA} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim, uint32\+\_\+t Channel)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+PWMN\+\_\+\+Start} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim, uint32\+\_\+t Channel)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+PWMN\+\_\+\+Stop} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim, uint32\+\_\+t Channel)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+PWMN\+\_\+\+Start\+\_\+\+IT} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim, uint32\+\_\+t Channel)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+PWMN\+\_\+\+Stop\+\_\+\+IT} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim, uint32\+\_\+t Channel)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+PWMN\+\_\+\+Start\+\_\+\+DMA} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim, uint32\+\_\+t Channel, const uint32\+\_\+t \texorpdfstring{$\ast$}{*}p\+Data, uint16\+\_\+t Length)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+PWMN\+\_\+\+Stop\+\_\+\+DMA} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim, uint32\+\_\+t Channel)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+One\+Pulse\+N\+\_\+\+Start} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim, uint32\+\_\+t Output\+Channel)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+One\+Pulse\+N\+\_\+\+Stop} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim, uint32\+\_\+t Output\+Channel)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+One\+Pulse\+N\+\_\+\+Start\+\_\+\+IT} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim, uint32\+\_\+t Output\+Channel)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+One\+Pulse\+N\+\_\+\+Stop\+\_\+\+IT} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim, uint32\+\_\+t Output\+Channel)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+Config\+Commut\+Event} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim, uint32\+\_\+t Input\+Trigger, uint32\+\_\+t Commutation\+Source)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+Config\+Commut\+Event\+\_\+\+IT} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim, uint32\+\_\+t Input\+Trigger, uint32\+\_\+t Commutation\+Source)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+Config\+Commut\+Event\+\_\+\+DMA} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim, uint32\+\_\+t Input\+Trigger, uint32\+\_\+t Commutation\+Source)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+Master\+Config\+Synchronization} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim, const \mbox{\hyperlink{struct_t_i_m___master_config_type_def}{TIM\+\_\+\+Master\+Config\+Type\+Def}} \texorpdfstring{$\ast$}{*}s\+Master\+Config)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+Config\+Break\+Dead\+Time} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim, const \mbox{\hyperlink{struct_t_i_m___break_dead_time_config_type_def}{TIM\+\_\+\+Break\+Dead\+Time\+Config\+Type\+Def}} \texorpdfstring{$\ast$}{*}s\+Break\+Dead\+Time\+Config)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+Group\+Channel5} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim, uint32\+\_\+t Channels)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+Remap\+Config} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim, uint32\+\_\+t Remap)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+TISelection} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim, uint32\+\_\+t TISelection, uint32\+\_\+t Channel)
\item 
void {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+Commut\+Callback} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim)
\item 
void {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+Commut\+Half\+Cplt\+Callback} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim)
\item 
void {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+Break\+Callback} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim)
\item 
void {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+Break2\+Callback} (\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim)
\item 
\mbox{\hyperlink{group___t_i_m___exported___types_gae0994cf5970e56ca4903e9151f40010c}{HAL\+\_\+\+TIM\+\_\+\+State\+Type\+Def}} {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+Hall\+Sensor\+\_\+\+Get\+State} (const \mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim)
\item 
\mbox{\hyperlink{group___t_i_m___exported___types_ga1a70fcbe9952e18af5c890e216a15f34}{HAL\+\_\+\+TIM\+\_\+\+Channel\+State\+Type\+Def}} {\bfseries HAL\+\_\+\+TIMEx\+\_\+\+Get\+Channel\+NState} (const \mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}htim, uint32\+\_\+t ChannelN)
\item 
void {\bfseries TIMEx\+\_\+\+DMACommutation\+Cplt} (\mbox{\hyperlink{group___d_m_a___exported___types_ga41b754a906b86bce54dc79938970138b}{DMA\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}hdma)
\item 
void {\bfseries TIMEx\+\_\+\+DMACommutation\+Half\+Cplt} (\mbox{\hyperlink{group___d_m_a___exported___types_ga41b754a906b86bce54dc79938970138b}{DMA\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}hdma)
\end{DoxyCompactItemize}


\doxysubsection{Detailed Description}
Header file of TIM HAL Extended module. 

\begin{DoxyAuthor}{Author}
MCD Application Team 
\end{DoxyAuthor}
\begin{DoxyAttention}{Attention}

\end{DoxyAttention}
Copyright (c) 2017 STMicroelectronics. All rights reserved.

This software is licensed under terms that can be found in the LICENSE file in the root directory of this software component. If no LICENSE file comes with this software, it is provided AS-\/\+IS. 